模拟集成电路分析与设计
格雷
A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current ...
Hossein Miri Lavasani & Wanling Pan & Brandon Harrington & Reza Abdolvand & Farrokh Ayazi
IEEE Standard for Information Technology—Teleco[..] and information ...
LAN/MAN Standards Committee of the IEEE Computer Society
高速串行接口时钟数据恢复电路设计研究
未知
Design Procedures for Three-Stage CMOS OTAs With Nested-Miller ...
功率谱密度计算
yzx
The Designer’s Guide to Spice and Spectre by Kenneth S. Kundert ...
4<8=8AB@0B>@
Static Timing Analysis final
普林斯顿概率论读本 (史蒂文．J．米勒 (Steven J. Miller)) (Z-Library)
2016 Book Transformer-Based[..]
PrimeSim� EMIR Reference Manual
Inc. Synopsys
基于斩波技术的CMOS运算放大器失[..]
低压低功耗CMOS带隙电压基准及启[..] 许长喜
MATLAB数字信号处理85个实用[..]
数字滤波器的MATLAB与FPGA[..]
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx, Inc.
现代控制系统 第八版
linhai
HJ-MASH 多模多标准CMOS锁相环频率综合器[..] 史鹏鹏
Jish
Design Procedure for Two-Stage CMOS Opamp using gm/ID design ...
Bakr Hesham & El-Sayed Hasaneen & Hesham F. A. Hamed