Session 33
未知
HIGH SPEED AND LOW POWER DYNAMIC LATCH COMPARATOR
BSIM4 AND MOSFET MODELING FOR IC SIMULATION
Hu, Chenming, Liu, Weidong
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
Power systems-on-chip practical aspects of design (Allard, Bruno) ...
4<8=8AB@0B>@
LDO设计小结一
zeng zhen
线性代数教材(同济五版+学习辅导与[..]
Acampo GmbH
jssc.2005.Replica Compensated Linear Regulators for PLLs
Introduction to advance node feathers
88691
纳米级CMOS逐次逼近A D转换器设计研究与实现
LDO LINEAR REGULATOR WITH IMPROVED TRANSIENT RESPONSE
Phillip E. Allen-CMOS Analog Circuit Design
一种用于LDO系统的极点频率调整方法
维普资讯有限公司
EDA与IC设计 CMOS集成电路后端设计与实战
刘峰编著
开关电源设计 第3版
（美）普利斯曼，比利斯，莫瑞著
Phase Locked Loops for Wireless Communications
Cadence SKILL Lan guage Reference
Inc. Cadence Design Sys tems
maloberti data converters
Fundamental Principles Behind the Sigma-Delta ADC Topology Part ...
Michael Clifford & Analog Devices Inc