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Spice-Oriented Nonlinear Circuit Analysis Using Harmonic Balance ...
NCSP'09
Cadence SKILL Lan guage Reference
Inc. Cadence Design Sys tems
LDO LINEAR REGULATOR WITH IMPROVED TRANSIENT RESPONSE
未知
Using ADS to simulate Noise Figure using a large-signal transistor ...
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bstj.1932.Nyquist, H.-Regeneration Theory
Virtuoso Parameterized Cell Reference
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Advanced Opamp Topologies (Part II)
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Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA ...
数值分析 第五版 (李庆扬 王能超 易大义) (z-lib.org)
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VerilogA系统设计与仿真（可[..]
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
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Modeling Jitter in PLL-based Frequency Synthesizers
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A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
thesis.dvi
IEEE Std 802.11b-1999
Design techniques for cascoded CMOS op amps with improved PSRR ...
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