Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture ...
Behzad Razavi
AM-PM distorion
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25Gbps系统封装和高速互连的信[..]
DCDC-EECS-2011-94
Session 15: Compute-in-Memory Processors for Deep Neural Networks
Julia中文文档
How to Calculate Balun Performances using ADS Expressions
Che-Sheng Chen
High Efficiency RF and Microwave Solid State Power Amplifiers
Paolo Colantonio, Franco Giannini & Ernesto Limiti
Design of Low Noise Amplifiers
Steve Long
两种新型CMOS带隙基准电路 程军
CNKI
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Session 10
一个全差分运放电路的设计
Administrator
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.
精通开关电源设计-中文版-第一版
A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...
Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa
带隙基准电路的研究
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Static timing analysis for nanometer designs a practical approach ...
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...