基于Latch的CMOS动态比较器的研究
未知
Design Procedures for Three-Stage CMOS OTAs With Nested-Miller ...
Power supply rejection ratio in operational transconductance ...
IEEE
数值分析
The Definitive ANTLR 4 Reference
Terence Parr
基准源、噪声、开关电容及Monte Carlo仿真
USB2.0协议中文版
Jungle
用于LDO稳压器的CMOS基准电压[..]
Session 31: Analog Techniques
CRYSTAL OSCILLATOR WITH PEAK DETECTOR AMPLITUDE CONTROL
用于OFDM+UWB系统中的中频滤[..]
分类号 密级
USER
1.5Bit 级pipelined+ADC典型单[..]
Session 11: Advanced Wireline Links and Techniques
SPI Block Guide V4
Freescale Semiconductor, Inc.
asicon.2009.53514[..] Power Supply Rejection
低压低功耗电流模CMOS带隙基准电路 孔令荣
ISSCC2021-T6-Basics of DAC-based Wireline Transmitters
模拟集成电路与系统 Analog Integrated Circuits and Systems
池保勇 编著