一个全差分运放电路的设计
Administrator
Dracula Reference
Inc. Cadence Design Sys tems
New Trends in Computational Electromagnetics (Özgür Ergül, Ozgur ...
未知
1V供电的低噪声带隙基准电压源
Adaptive Filter Theory 5/E
Simon Haykin
Microsoft Word - LNA.doc
拉扎维《CMOS集成电路设计》答案手写版
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
Middlebrook Part 1
mwidmer
LDO中过温保护电路的设计
ISSC2021 SESSION 2
设计Bandgap时考虑的几个问题
yzx
ISSCC2021-SC3-Clo[..] Clock Distribution, and Clock Management ...
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
PHASE ERROR CANCELLATION
微波射频电路设计与仿真100例
CMOS模拟集成电路设计与仿真实例[..] ADE
Synthesis of Arithmetic Circuits : FPGA, ASIC, and Embedded ...
Deschamps & Jean-Pierre. & Bioul & Gery Jean Antoine. & Sutter & Gustavo D.
PCI Express PHY v1.0 LogiCORE IP Product Guide
Xilinx, Inc.
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface ...
Intel Corporation