Cadence高速电路板设计
未知
基于CMOS工艺的全芯片ESD保护[..]
控制之美 卷1 (王天威) (Z-Library)
LINUX设备驱动程序
Jonathan Corbet，Alessandro Rubini，Greg Kroah-Hartman著；魏永明，耿岳，钟书毅译
Session 24
一种基于LDO稳压器的带隙基准电压源设计
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
系统芯片中的全数字锁相环设计
PCI.Express.Base.2.0
CMOS射频集成电路分析与设计 清华池保勇
基于功耗优化的Pipelined+[..] (1)
基于CMOS工艺的负压低压差线性稳[..]
5.0Gbps高速串行USB3.0[..]
PrimeWave� Design Environment User Guide
Inc. Synopsys
Session 21
FinFET Modeling for IC Simulation and Design
4<8=8AB@0B>@
Keliu Shu-2005 CMOS PLL Synthesizers Analysis and Design
AN827_RevA.fm
mamiller
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
Xilinx, Inc.