Session 9
未知
Quantus Substrate Tech nology Characterization Manual
Inc. Cadence Design Sys tems
A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin
基于0.13μm SOI CMOS工艺的高性能LDO设计
Katsuhiko Ogata
dynstab2/ThePirateBay
低压低功耗CMOS带隙电压基准及启[..] 许长喜
PrimeSim� HSPICE® User Guide: Advanced Analog Simulation and ...
Inc. Synopsys
模拟集成电路设计与仿真
何乐年
半导体器件物理(原书第三版)中文版[..]
数字信号处理导论MATLAB实现 2版 (Robert A.Schlling Sandra L... (z-lib.org)
电路
丘关源
FPGA 全芯片 ESD 防护设计和优化
USER
Differential Equations Theory, Technique, and Practice by George ...
LINEAR SYSTEMS AND SIGNALS
B. P. Lathi & R. A. Green
2004Beek
Computing ACPR from 1Tone HB ADS 2011
aehoward
分类号 密级
93.张强-高性能Rail to Rail恒定跨导CMOS运算放大器
A Single-Trim CMOS Bandgap Reference With aInaccuracy of0.15% ...
Guang Ge & Cheng Zhang & Gian Hoogzaad & Kofi A. A. Makinwa