[Behzad Razavi] Phase-Locking in High-Performance (BookFi)
未知
Cadence高速电路板设计
GPS接收机内带镜像抑制的中频滤波器设计
Virtuoso Editing 的使用简介
Richey
Switching Power Supplies A to Z
Maniktala, Sanjaya.
PHASE ERROR CANCELLATION
全数字锁相环建模及分析代码-2014
Front Cover Circuit Analysis I.qxd (Page 1)
Karris, Steven T.
Distributed Loss-Compensation Techniques for Energy-Efficient ...
线性代数及其应用
Design Procedures for Three-Stage CMOS OTAs With Nested-Miller ...
AMBA AXI and ACE Protocol Specification AXI3, AXI4, and AXI4-Lite ...
ARM Limited
Session 16
Spectre Circuit Simulator RF Analysis Library Reference
Inc. Cadence Design Sys tems
Quantus Substrate Tech nology Characterization Manual
A 2.488–11.2 Gb/s multi-protocol SerDes in 40nm low-leakage ...
Socrates D. Vamvakos & Claude R. Gauthier & Chethan Rao & Karthisha Ramoshan Canagasaby & Prashant Choudhary & Sanjay Dabral & Shaishav Desai & Mahmudul Hassan & K.C. Hsieh & Bendik Kleveland & Gurupada Mandal & Richard Rouse & Ritesh Saraf & Alvin Wang & Jason Yeung & Khaldoon Abugharbieh & Ying Cao
Session 10
Electronic Circuit and System Simulation Methods
Lawrence T. Pillage, Ronald A. Rohrer, Chandramouli Visweswariah
Calibre® WORKbench User's and Reference Manual
Siemens Industry Software
Calibre® Local Printability Enhancement User's and Reference ...
Standard Verification Rule Format (SVRF) Manual 2023
Standard Verification Rule Format (SVRF) Manual 2020
Mentor Graphics Corporation