模拟集成电路的分析与设计格雷 第四版
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Session 1: Plenary Session — Invited Papers
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
Session 30: Non-Volatile Memories
Tempus User Guide
Inc. Cadence Design Sys tems
一种低噪声高电源抑制比CMOS低压[..]
SPI Block Guide V4
Freescale Semiconductor, Inc.
信号与系统 2nd 西蒙赫金
功率谱密度计算
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一种大电流LDO稳压器的设计
Convert to PDF
MySher
Microsoft PowerPoint - PLL_UT_tutorial_A[..]
enjoy
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching ...
Chun-Cheng Liu;Soon-Jyh Chang;Guan-Ying Huang;Ying-Zu Lin
untitled
A TIA in CMOS 0.18um
Session 16
PWM/PFM 模式 DC-DC 升压转换器电路的设计
yyk
Spectre Circuit Simulator and Accelerated Parallel Simula tor ...
StarRC User Guide and Command Reference
Synopsys, Inc.