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GPS接收机内带镜像抑制的中频滤波器设计

GPS接收机内带镜像抑制的中频滤波器设计

Calibre® DESIGNrev Reference Manual

Calibre® DESIGNrev Reference Manual

Siemens Industry Software

Session 13

Session 13

学校代码 10530 学号 201110061316

学校代码 10530 学号 201110061316

VLSI Physical Design: From Graph Partitioning to Timing Closure

VLSI Physical Design: From Graph Partitioning to Timing Closure

Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu

Perl语言入门第六版

Perl语言入门第六版

超标量处理器设计 (姚永斌) (z-lib.org)

超标量处理器设计 (姚永斌) (z-lib.org)

FPGA数字信号处理设计教程-system generator入门与提高

FPGA数字信号处理设计教程-sy[..] generator入门与提高

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Phase Locked Loops for Wireless Communications

Phase Locked Loops for Wireless Communications

Spectre Circuit Simulator RF Analysis Library Reference

Spectre Circuit Simulator RF Analysis Library Reference

Inc. Cadence Design Sys tems

Verilog HDL Design Examples

Verilog HDL Design Examples

Joseph Cavanagh

Session 36

Session 36

一种具有高电源抑制比的低功耗CMOS带隙基准电压源汪宁

一种具有高电源抑制比的低功耗CMO[..] 汪宁

计算电磁学要论 by 盛新庆 (z-lib.org)

计算电磁学要论 by 盛新庆 (z-lib.org)

AN 812: Platform Designer System Design Tutorial

AN 812: Platform Designer System Design Tutorial

Intel Corporation

电路原理（第7版）

电路原理（第7版）

Modeling Jitter in PLL-based Frequency Synthesizers

Modeling Jitter in PLL-based Frequency Synthesizers

Category: sigma-delta adc topology

Fundamental Principles Behind the Sigma-Delta ADC Topology Part 1

Fundamental Principles Behind the Sigma-Delta ADC Topology Part ...

Michael Clifford & Analog Devices Inc