ISSCC2021 Session 29
未知
Low Drop-Out Voltage Regulators: Capacitor-less Architecture ...
Joselyn Torres & Mohamed El-Nozahi & Ahmed Amer & Seenu Gopalraju & Reza Abdullah & Kamran Entesari & Edgar Sanchez-Sinencio
一种带过温保护和折返电流限的LDO设计
Wideband RF PLL fractional/integer frequency synthesizer with ...
STMICROELECTRONICS
Session 27
eetop.cn CMOS VLSI Design A Circuits and Systems Perspective ...
锁相环(PLL)电路设计与应用
(日)远坂俊昭 著 何希才译
Abraham uta GPIO ESD
Administrator
Topics in Multiple-Loop Regulators and Current-Mode Programming
The Design of Low-Noise Bandgap References - Circuits and Systems ...
IEEE
Modified modeling of Miller compensation for two-stage operational ...
H.C. Yang;D.J. Allstot
ISSCC2021-SC2
数值分析.Timothy Sauer.图灵中文扫描版
研究生系列教材 数字信号处理：时域离散随机信号处理 11761429
IEEE Std 802.11b-1999
VerilogA系统设计与仿真（可[..]
LDO低压差线性稳压器核心电路的设计
ISSCC2021-T5-Cali[..] Techniques in ADCs
微波工程 （第3版）
（美）DAVID M.POZAR著 张肇仪 周乐柱 吴德明等译