Verilog HDL Design Examples
Joseph Cavanagh
控制之美 卷1 (王天威) (Z-Library)
未知
Delta-Sigma Data Converters: Theory, Design, and Simulation
GABOR C. TEMES & Steven R. Norsworthy & Richard Schreier
Session 21
Pyros Interactive Viewer User Guide
Inc. Synopsys
ISSCC2021-T7-Basic Design Approaches to Accelerating Deep Neural ...
NONE
TOM
开关电源设计 第3版
（美）普利斯曼，比利斯，莫瑞著
数字滤波器的MATLAB与FPGA[..]
0071509054.pdf
Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES
相位噪声、通行链路预算
yzx
自适应滤波器原理
（美）赫金 & 郑宝玉等译
CMOS模拟集成电路设计与仿真实例[..] ADE
NoiseDesign.dvi
零点极点
信号与系统下 第三版
ESD Analog Circuits and Design
sido buck converter
Duyu Liu & Xinzhi Liu & Hao Chen & Shouming Zhong