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Discover (Random Books)

Elementary Differential Equations and Boundary Value Problems

Elementary Differential Equations and Boundary Value Problems

William E. Boyce & Richard C. Diprima & Douglas B. Meade

Computer Arithmetic - Algorithms and Hardware Designs

Computer Arithmetic - Algorithms and Hardware Designs

Parhami

2017 Book OperationalAmplifiers

2017 Book OperationalAmplif[..]

未知

CMOS模拟集成电路版图设计与验证 基于Cadence Virtuoso与Mentor Calibre

CMOS模拟集成电路版图设计与验证 基于Cadence Virtuoso与Mentor Calibre

尹飞飞

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

低功耗逐次逼近寄存器模数转换器综述 丁召明 (1)

低功耗逐次逼近寄存器模数转换器综述 丁召明 (1)

CNKI

examples

examples

server1

一种动态零点补偿的LDO线性稳压器设计

一种动态零点补偿的LDO线性稳压器设计

未知

AMBA AXI and ACE Protocol Specification AXI3, AXI4, and AXI4-Lite ACE and ACE-Lite

AMBA AXI and ACE Protocol Specification AXI3, AXI4, and AXI4-Lite ...

ARM Limited

BOOK-010005000009-0000005244-0501202032.tif

BOOK-010005000009[..]

zhenying.luo

控制之美 卷1 (王天威) (Z-Library)

控制之美 卷1 (王天威) (Z-Library)

未知

PDFѹËõÆ÷

PDFѹËõÆ÷

未知

微波工程 (第3版)

微波工程 (第3版)

(美)DAVID M.POZAR著 张肇仪 周乐柱 吴德明等译

ANALOG CMOS IC DESIGN 模拟CMOS集成电路设计

ANALOG CMOS IC DESIGN 模拟CMOS集成电路设计

魏廷存 & 陈莹梅 & 胡正飞

(Analog Circuits and Signal Processing) Danica Stefanovic, Maher Kayal

(Analog Circuits and Signal Processing) Danica Stefanovic, Maher ...

Structu

一种极低静态电流LDO线性稳压器的设计

一种极低静态电流LDO线性稳压器的设计

未知

IEEE Standard for Information Technology—Telecommunications and information exchange between systems—LANs and MANs—Specific requirements—Part 11: WLAN MAC and PHY Specifications—Amendment 5: Enhancements for Higher Throughput

IEEE Standard for Information Technology—Teleco[..] and information ...

LAN/MAN Standards Committee of the IEEE Computer Society

Session 15: Compute-in-Memory Processors for Deep Neural Networks

Session 15: Compute-in-Memory Processors for Deep Neural Networks

未知

Category: SoC

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...

Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly

Book Details

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