Charge Pump Circuit Design [Pan, Feng and Samaddar, Tapan] Good ...
未知
maloberti data converters
04_TechActive.fm
Administrator
Fire and Ice QXC to Quantus Migration Guide
Inc. Cadence Design Sys tems
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...
Xilinx, Inc.
电路分析
LINEAR SYSTEMS AND SIGNALS
B. P. Lathi & R. A. Green
Handbook of Algorithms for Physical Design Automation
Charles J. Alpert, Dinesh P. Mehta, Sachin S. Sapatnekar
Session 5: Analog Interfaces
ISSCC 2019 Digest of Technical Papers
Voltus-Fi Hierarchical IR Drop and EM Analysis
PHASE ERROR CANCELLATION
Cadence SKILL Lan guage Reference
14990665645773625[..]
基于自偏置技术的锁相环设计 刘克赛2019
刘克赛
AI算法工程师手册
无电容型LDO的研究现状与进展
一种高精度的CMOS带隙基准电压源
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly