一种带软启动电路的带隙基准电压源的实现 张科
CNKI
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...
Xilinx, Inc.
Keliu Shu-2005 CMOS PLL Synthesizers Analysis and Design
未知
通信原理公式手册
艇长
python 数值分析
Mirella Misiaszek
Session 1: Plenary Session — Invited Papers
Noise and Spurious Tones Management Techniques for Multi-GHz ...
Adrian Maxim
AMBA总线规范_V2.0
kongsuo
verilog HDL那些事
akuei2
一种带过温过流过压保护的LDO设计
DDR3存储器接口电路的设计与实现[..]
Nested Miller compensation in low-power CMOS design
Ka Nang Leung;P.K.T. Mok
sido buck converter
Duyu Liu & Xinzhi Liu & Hao Chen & Shouming Zhong
Frequency Reconfigurable mm-Wave Power Amplifier With Active ...
Chandrakanth R. Chappidi & Kaushik Sengupta
SAR ADC-MIT
Embedded Mixed-Signal IP Development Methodology in 90nm CMOS ...
Rakesh H. Patel & William Bereza
Analog Behavioral Modeling with the Verilog-A Language
简并点优化的高性能带隙基准电路 应建华
LINEAR SYSTEMS AND SIGNALS
B. P. Lathi & R. A. Green