高速数字电路设计中信号完整性分析与研究
未知
Noise and Spurious Tones Management Techniques for Multi-GHz ...
Adrian Maxim
RISC-V IOMMU Architecture Specification
IOMMU Task Group
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
OPAMP设计-tangzhangwen
Zhangwen Tang
ISSCC2021-SC2-PLL Architectures, Tradeoffs, and Key Application ...
A fast-settling CMOS op amp for SC circuits with 90-dB DC gain
K. Bult;G.J.G.M. Geelen
CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...
Bram De Muer & Michiel Steyaert
一种基于斩波调制的低压高精度CMO[..] 刘帘曦
Adaptive Filter Theory 5/E
Simon Haykin
ISSCC2021-SC4
Gabriel Alfonso Rincón-Mora
Analog IC Design An Intuitive Approach (Chapters 1-8)-Gabriel ...
基于0.13μm SOI CMOS工艺的高性能LDO设计
Operation and Modeling of the MOS Transistor By Tsividis
Session 15: Compute-in-Memory Processors for Deep Neural Networks
计算电磁学 by 王秉中,邵维 (z-lib.org)
CNKI
Generate ESD Source in ADS
TU,NASH (K-Taiwan,ex1)
基于Latch的CMOS动态比较器的研究
The Method of Moments in Electromagnetics
Walton C. Gibson