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方法论篇--修改稿(更新).PDF

方法论篇--修改稿(更新).PDF

ISSCC2020-01 Digest

ISSCC2020-01 Digest

集成电路掩模设计－基础版图技术

集成电路掩模设计－基础版图技术

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques [Paper] - Solid-State Circuits, IEEE Journal of

Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...

电路设计仿真

电路设计仿真

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, IEEE Journal of

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...

A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure

A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching ...

Chun-Cheng Liu;Soon-Jyh Chang;Guan-Ying Huang;Ying-Zu Lin

一种自参考结构的高速高精度片上时钟抖动测量系统

一种自参考结构的高速高精度片上时钟[..]

Chap1_20160228_4.dvi

Chap1_20160228_4.dvi

数字VLSI芯片设计使用Cadence和Synopsys CAD工具

数字VLSI芯片设计使用Cadence和Synopsys CAD工具

艾瑞克·布鲁范德著

Session 4: Processors

Session 4: Processors

一款超低噪声快速启动的CMOS带隙基准电路设计刘鸿雁

一款超低噪声快速启动的CMOS带隙[..] 刘鸿雁

Computational Methods in Electromagnetic Compatibility Antenna Theory Approach versus Transmission Line Models by Dragan Poljak Khalil El-Khamlichi Drissi (z-lib.org)

Computational Methods in Electromagnetic Compatibility Antenna ...

锁相环技术(第3版)——PhaseLock Techniques, Third Edition

锁相环技术(第3版)——Phase[..] Techniques, Third Edition

Floyd M. Gardner 著 & 姚剑清 & 译

天线（第三版）约翰克劳斯中文高清全本

天线（第三版）约翰克劳斯中文高清全本

CN106656160A-上海集成电路研发中心2017-优化占空比的高速电平转换电路

CN106656160A-上海集成[..]

Session 4

Session 4

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CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration (The Springer International Series in Engineering and Computer Science)

CMOS Fractional-N Synthesizers: Design for High Spectral Purity ...

Bram De Muer & Michiel Steyaert