Cadence高速电路板设计与仿真 信号与电源完整性分析 第5版
未知
高速串行接口时钟数据恢复电路设计研究
A 0.46ps RJ<inf>rms</inf> 5GHz wideband LC PLL for multi-protocol ...
Chethan Rao & Shaishav Desai & Alvin Wang
PDFѹËõÆ÷
PrimeWave� Design Environment User Guide
Inc. Synopsys
开关电容电路 从入门到精通
Voltus IC Power Integrity Solution User Guide
Inc. Cadence Design Sys tems
SAR ADC-MIT
Session 22
LDO与VLDO的设计原理及性能测试
The advanced part of A treatise on the dynamics of a system ...
Routh, Edward John, 1831-1907.
compact trimming design of a high precision reference
High-Speed Architecture for a Programmable Frequency Divider ...
IEEE
深亚微米CMOS工艺ESD器件结构[..]
微软用户
Design Procedure for Two-Stage CMOS Transconductance Operational ...
有限元方法(第五版)第一卷 基本原理
(英)O.C.Zienkiewicz (美)R.L.Taylor著
使用电压基准进行设计的提示和技巧
Texas Instruments, Incorporated [ZHCC347,*]
IEEE Std 802.11g-2003 [Amendment to IEEE Std 802.11, 1999 Edition ...
LAN/MAN Standards Committee of the IEEE Computer Society
Xilinx DS534, FIR Compiler v5.0, Data Sheet
Xilinx, Inc.
Xilinx DS249 LogiCORE IP CORDIC v4.0, Data Sheet,
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...
JESD204 v7.2 LogiCORE IP Product Guide (PG066)