Session 27
未知
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
功率谱密度计算
yzx
LDO模拟集成电路设计
LOCK DETECTION CIRCUIT AND LOCK (56) Oct. 18, 2011 References ...
IEEE Std 802.11b-1999
Microsoft Word - Bandgap reference design concept and flow.doc
TMTT 202212
数字设计 原理与实践 第4版
（美）韦克利（Wakerly，J.F.）著；林生等译
Microsoft Word - Telescopic.doc
chwtang
DesignWare Synthesizable Components for AMBA 3 AXI, and AMBA ...
Synopsys, Inc.
www.bzfxw.com
标准分享网
CMOS集成电路版图+概念、方法与[..]
Session 24
A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...
Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi
偏微分方程数值解法 第2版
CN101140511B-硅谷数模[..] carry binary adder
Matlab LTE System Toolbox documentation () (Z-Library)
Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.