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现代控制理论第2版 (张嗣瀛) (Z-Library)

现代控制理论第2版 (张嗣瀛) (Z-Library)

ISSCC2021 Session 21

ISSCC2021 Session 21

A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process

A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process

Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li

有限元方法（第五版）第一卷基本原理

有限元方法（第五版）第一卷基本原理

（英）O.C.Zienkiewicz （美）R.L.Taylor著

2004Beek

2004Beek

CN101140511B-硅谷数模2010-Cascaded carry binary adder

CN101140511B-硅谷数模[..] carry binary adder

The Design of CMOS Radio-Frequency Integrated Circuits, Second Edition

The Design of CMOS Radio-Frequency Integrated Circuits, Second ...

The Designer’s Guide to Spice and Spectre by Kenneth S. Kundert (auth.) (z-lib.org)

The Designer’s Guide to Spice and Spectre by Kenneth S. Kundert ...

高速低功耗SAR ADC的关键技术研究与系统设计

高速低功耗SAR ADC的关键技术研究与系统设计

393747_Print.indd

393747_Print.indd

带隙基准电路的研究

带隙基准电路的研究

04_TechActive.fm

04_TechActive.fm

Calibre® DESIGNrev Reference Manual

Calibre® DESIGNrev Reference Manual

Siemens Industry Software

Session 13: Cyro-CMOS for Quantum Computing

Session 13: Cyro-CMOS for Quantum Computing

模拟集成电路

模拟集成电路

Distributed Loss-Compensation Techniques for Energy-Efficient Low-Latency On-Chip Communication

Distributed Loss-Compensation Techniques for Energy-Efficient ...

控制之美（卷1）——控制理论从传递函数到状态空间

控制之美（卷1）——控制理论从传递[..]

Constraining Designs for Synthesis and Timing Analysis A Practical Guide to Synopsys Design Constraints (SDC) (Sridhar Gangadharan, Sanjay Churiwala (auth.)) (z-lib.org)

Constraining Designs for Synthesis and Timing Analysis A Practical ...

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IEEE Standard for Ethernet

IEEE Standard for Ethernet