Session 15: Compute-in-Memory Processors for Deep Neural Networks
未知
Nested Miller compensation in low-power CMOS design
Ka Nang Leung;P.K.T. Mok
CMOS模拟集成电路设计布局仿真-[..]
Avalon Verification IP Suite User Guide
Altera Corporation
FPGA 全芯片 ESD 防护设计和优化
USER
PCI Express Base r3.1
Bill Haffner
A 1 GHz CMOS RF Front-End IC for a Direct-Conversion Wireless ...
IEEE
光通信集成电路设计第2版中文——拉扎维
bstj.1932.Nyquist, H.-Regeneration Theory
mssc.2015.Razavi-The StrongARM Latch
模拟CMOS集成电路设计 第一版
2016 Book Transformer-Based[..]
eetop.cn TN07CLDR001 1 3
概率论及其应用第2卷 (威廉·费勒) (Z-Library)
Harmonic balance finite element method applications in nonlinear ...
Dracula Reference
Inc. Cadence Design Sys tems
Low-Jitter Process-Independent DLL and PLL Based on Self-Biased ...
Design of Chopper-Stabilized Amplifiers With Reduced Offset ...
Embedded Design Handbook
Intel Corporation