CMOS带隙基准源研究与设计
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未知
FPGA数字信号处理设计教程-sy[..] generator入门与提高
Harmonic balance finite element method applications in nonlinear ...
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JESD204 v7.2 LogiCORE IP Product Guide (PG066)
Xilinx, Inc.
Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture ...
Behzad Razavi
阻抗匹配与史密斯（Smith）圆图[..]
ADS2008射频电路设计与仿真实例
徐兴福 著
Quantus Extraction Users Manual
基于0.13μm SOI CMOS工艺的高性能LDO设计
Verification of SD/MMC Controller IP Using UVM
Phase Locked Loops for Wireless Communications
Session 34: Emerging Imaging Solutions
实例讲解multisim10电路仿真
离散数学及其应用
Session 11: Advanced Wireline Links and Techniques
RF and Microwave Power Amplifier Design
Andrei Grebennikov
Intel® Arria® 10 and Intel® Cyclone® 10 GX Avalon®-MM Interface ...
Intel Corporation
AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...