Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet
Xilinx, Inc.
Session 32: Frequency Synthesizers
未知
A 0.775mW 10-bit 40-MS/s SAR ADC in 0.18μm CMOS process
Wenzha Yang & Yi Zhang & Enwen Dai & ZhiLin Feng & Wei Li
Fundamentals of Layout Design for Electronic Circuits
Jens Lienig Juergen Scheible
jrproc.1950.Bothw[..] F.E.-Nyquist Diagrams and the Routh-Hurwitz ...
Circuit Techniques for Reducing the Effects of Op-Amp Imperfections: ...
IEEE
学校代码： 10246
tcheng
Gabriel Alfonso Rincón-Mora
Analog IC Design An Intuitive Approach (Chapters 1-8)-Gabriel ...
ADC-based Receivers for Wireline Communication
Sigma-Delta ADCs - Tutorial | Maxim Integrated
ISSCC2021-T9-Desi[..] Amplifiers for Stability
Convert to PDF
MySher
RF CMOS Oscillators for Modern Wireless Applications
Masoud Babaie, Mina Shahmohammadi & Robert Bogdan Staszewski
设计Bandgap时考虑的几个问题
yzx
Session 10: Continuous-Time ADCs and DACs
ARM AMBA 5 AHB Protocol Specification AHB5, AHB-Lite
ARM Limited
An improved bandgap reference with high power supply rejection ...
LDO线性稳压器中高性能误差放大器的设计
IEEE Standard for Ethernet