CMOS模拟集成电路设计与仿真实例 基于Hspice
未知
Computational Methods for Electromagnetic Phenomena
Cai, Wei
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen
Microsoft PowerPoint - PLLnoise_jitter02[..] [相容模式]
cwhsu
一种基于OTA的低功耗高速静态比较[..]
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
现代接收机
Paul Schwartz
Gabriel Alfonso Rincón-Mora
Analog IC Design An Intuitive Approach (Chapters 1-8)-Gabriel ...
离散数学及其应用
一种快速瞬态响应的无片外电容LDO
CN101140511B-硅谷数模[..] carry binary adder
多采样率系统：采样率转换和数字滤波器组
一种自适应补偿的宽输入LDO设计
Report for current mirror OPAMP
全差分运算放大器设计
唐长文
ISSCC2021 Session 17
Memory systems_ cache, DRAM, disk -- Bruce Jacob, Spencer Ng, ...
锁相环技术(第3版)——Phase[..] Techniques, Third Edition
Floyd M. Gardner 著 & 姚剑清 & 译