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Discover (Random Books)

DCDC变换器工作原理及设计

DCDC变换器工作原理及设计

MPS

最优控制理论与应用

最优控制理论与应用

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Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA Front End With On-Antenna Noise-Canceling and <italic>G&#x2098;</italic>-Boosting

Multi-Feed Antenna and Electronics Co-Design: An E-Band Antenna-LNA ...

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基准源和温度检测模块设计-tangzhangwen

基准源和温度检测模块设计-tang[..]

zwtang

Harmonic Balance Finite Element Method: Applications in Nonlinear Electromagnetics and Power Systems

Harmonic Balance Finite Element Method: Applications in Nonlinear ...

Junwei Lu & Xiaojun Zhao & Sotoshi Yamada

PoleZero.dvi

PoleZero.dvi

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Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice Hall, Inc)

Pages from M.E. Van Valkenburg - Network Analysis 6(1959, Prentice ...

libgen.lc-2

Session 15: Compute-in-Memory Processors for Deep Neural Networks

Session 15: Compute-in-Memory Processors for Deep Neural Networks

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Linear Control System Analysis and Design with MATLAB®, Sixth Edition

Linear Control System Analysis and Design with MATLAB®, Sixth ...

Houpis, Constantine H., Sheldon, Stuart N.

eetop.cn 电路分析

eetop.cn 电路分析

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A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13&#x03BC;m CMOS process

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13&#x03BC;m CMOS process

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin

Design of Sigma-Delta Converters in MATLAB® Simulink®

Design of Sigma-Delta Converters in MATLAB® Simulink®

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Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

Silicon-Germanium Heterojunction Bipolar Transistors (2002)

Silicon-Germanium Heterojunction Bipolar Transistors (2002)

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A mixed-mode esd protection circuit simulation-design methodology - Solid-State Circuits, IEEE Journal of

A mixed-mode esd protection circuit simulation-design methodology ...

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Design and Simulation of LNA using Advanced Design Systems (ADS)

Design and Simulation of LNA using Advanced Design Systems (ADS)

USER

现代控制系统 第八版

现代控制系统 第八版

linhai

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS SerDes FPGAs

Embedded Mixed-Signal IP Development Methodology in 90nm CMOS ...

Rakesh H. Patel & William Bereza

Category: 第1版 (2010年2月5日)

锁相环(PLL)电路设计与应用

锁相环(PLL)电路设计与应用

(日)远坂俊昭 著 何希才译

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