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现代控制理论（第三版）

现代控制理论（第三版）

刘豹唐万生主编

Analytical Phase-Noise Modeling and Charge Pump Optimization for Fractional-<formula formulatype="inline"><tex Notation="TeX">$N$</tex> </formula> PLLs

Analytical Phase-Noise Modeling and Charge Pump Optimization ...

Frank Herzel;Sabbir A. Osmany;J. Christoph Scheytt

Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level

Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture ...

Static timing analysis for nanometer designs a practical approach (Rakesh Chadha, J. Bhasker (auth.)) (z-lib.org)

Static timing analysis for nanometer designs a practical approach ...

PCI Express Base r3.1

PCI Express Base r3.1

Convert to PDF

Convert to PDF

带隙基准电路的研究

带隙基准电路的研究

Session 10

Session 10

Microsoft Word - AXI protocol 翻译.doc

Microsoft Word - AXI protocol 翻译.doc

Frequency Compensation of Op-amp and its types Circuit Digest

Frequency Compensation of Op-amp and its types Circuit Digest

基于0.13μm SOI CMOS工艺的高性能LDO设计

基于0.13μm SOI CMOS工艺的高性能LDO设计

ISSCC2021 Session 28

ISSCC2021 Session 28

Bandgap & LDO-李福乐

Bandgap & LDO-李福乐

[集成电路掩膜板设计].IC.Mask.Design

[集成电路掩膜板设计].IC.Ma[..]

Jespers-The gm ID Methodology, a sizing tool

Jespers-The gm ID Methodology, a sizing tool

高能效流水线模数转换器的研究与设计

高能效流水线模数转换器的研究与设计

LINEAR SYSTEMS AND SIGNALS

LINEAR SYSTEMS AND SIGNALS

B. P. Lathi & R. A. Green

Digital Control

Digital Control

Category: jitter

Modeling Jitter in PLL-based Frequency Synthesizers

Modeling Jitter in PLL-based Frequency Synthesizers

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique

A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop ...

Yongsun Lee & Taeho Seong & Seyeon Yoo & Jaehyouk Choi