AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)
Xilinx, Inc.
数值分析
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FPGA数字信号处理设计教程-sy[..] generator入门与提高
CN106357266B-华为20[..]
锁相环(PLL)电路设计与应用
(日)远坂俊昭 著 何希才译
CMOS模拟集成电路设计与仿真实例 基于Hspice
Calibre® WORKbench User's and Reference Manual
Siemens Industry Software
ISSCC2021-T9-Desi[..] Amplifiers for Stability
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
Analysis and Design of ESD Protection for Robust Low-Power Pierce ...
Kim B. Ostman & Erlend Strandvik & Phil Corbishley & Tor Oyvind Vedal & Mika Salmi
Linear Circuit Transfer Functions: An Introduction to Fast Analytical ...
Christophe P. Basso
一种适用于微传感器读出电路的低噪声[..] (1)
集成电路版图设计
余华,师建英编著
Session 16: Computation in Memory
通信标准对数据转换器的要求V1.0
现代控制理论 (第三版)
刘豹 唐万生主编
ISSCC2021-SC2
Session 22
Modeling Jitter in PLL-based Frequency Synthesizers
Ken Kundert
Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N ...
Bo Zhou & Yao Li & Fuyuan Zhao