基于 DLL倍频技术的 1GHz本地振荡器设计 英文 李金城
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Session 35: Adaptive Digital Techniques for Variation Tolerant ...
FREQUENCY DIVIDINGAPPARATUS AND RELATED METHOD
LDO设计小结一
zeng zhen
微波工程
David M. Pozar
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
SystemVerilog验证 测试平台编写指南
IEEE Standard for Information Technology—Teleco[..] and information ...
LAN/MAN Standards Committee of the IEEE Computer Society
Computational Electromagnetics with MATLAB®, Fourth Edition
Matthew N.O. Sadiku
Wideband RF PLL fractional/integer frequency synthesizer with ...
STMICROELECTRONICS
Calibre® Local Printability Enhancement User's and Reference ...
Siemens Industry Software
PrimeSim� User Guide: Pro and SPICE
Inc. Synopsys
Power Management Techniques for Integrated Circuit Design, Ke-Horng ...
LDO低压差线性稳压器核心电路的设计
Analog Behavioral Modeling with the Verilog-A Language
ADS Interoperability for RFIC Design with ADS 2016.01
Keysight EEsof EDA
2-Stage OTA Design
Numerical Simulation of Optical Wave Propagation With Examples ...
Jason D. Schmidt
Frequency Reconfigurable mm-Wave Power Amplifier With Active ...
Chandrakanth R. Chappidi & Kaushik Sengupta