PHASE ERROR CANCELLATION
未知
一种基于内部迟滞比较器的新型RC振荡器
Session 26V
天线(第三版)约翰克劳斯中文高清全本
模拟电路与数字电路
林捷
2005 Book ClockGeneratorsFo[..]
DUTY CYCLE CORRECTION CIRCUITRY
Verilog HDL Design Examples
Joseph Cavanagh
PowerManagmentIC
khchen
ISSCC2021-T10-Fun[..] of Fully-Integrated Voltage Regulators
ISSCC2021-T5-Cali[..] Techniques in ADCs
高精度sigma-delta ADC设计研究与实现
模拟集成电路设计精粹——Analog Design Essentials
Willy M.C. Sansen 著 & 陈莹梅 译 & 王志功 审校
一种10 ppm oC低压CMOS带隙电压基准源设计 朱樟明
CNKI
Tradeoffs and Optimization in Analog CMOS Design
David M. Binkley
Microsoft PowerPoint - PLL_UT_tutorial_A[..]
enjoy
半导体物理学 (第七版)
Research and Design of Buck-Boost DC-DC Converter
Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...
Cheng-Ru Ho & Mike Shuo-Wei Chen