高频高速电子系统中的信号完整性研究
未知
集成电路掩模设计-基础版图技术
Session 8: Ultra-High-Speed Wireline
基于CMOS工艺的负压低压差线性稳[..]
Verilog数字系统设计教程
Microsoft PowerPoint - plenary_2021_reserve
Albert
Microsoft Word - AXI protocol 翻译.doc
<C0EECBB6>
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...
Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly
New Trends in Computational Electromagnetics (Özgür Ergül, Ozgur ...
光通信集成电路设计第2版中文——拉扎维
Numerical Analysis (Richard L. Burden, J. Douglas Faires etc.) ...
PLL WITH LOW SPURS
CMOS: Circuit Design, Layout, and Simulation
R. Jacob Baker
X-Parameters
DAVID E. ROOT
Tradeoffs and Optimization in Analog CMOS Design
David M. Binkley
一种基于内部迟滞比较器的新型RC振荡器
Session 30
一种用于LDO系统的极点频率调整方法
维普资讯有限公司
Noise and Spurious Tones Management Techniques for Multi-GHz ...
Adrian Maxim