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模拟电路与数字电路

模拟电路与数字电路

开关电容电路从入门到精通

开关电容电路从入门到精通

RF and Microwave Power Amplifier Design

RF and Microwave Power Amplifier Design

Andrei Grebennikov

基于延迟锁相环的时钟发生器设计

基于延迟锁相环的时钟发生器设计

Middlebrook Part 2

Middlebrook Part 2

全差分运算放大器设计

全差分运算放大器设计

Layout Techniques for Integrated Circuit Designers

Layout Techniques for Integrated Circuit Designers

Cadence PVS Developers Guide

Cadence PVS Developers Guide

Inc. Cadence Design Sys tems

低电压、低功耗助听器电路系统芯片研究

低电压、低功耗助听器电路系统芯片研究

2.7Gbps收发器中LVDS驱动电路的设计

2.7Gbps收发器中LVDS驱动[..]

Using ADS to simulate Noise Figure using a large-signal transistor model

Using ADS to simulate Noise Figure using a large-signal transistor ...

Calibre® DESIGNrev Reference Manual

Calibre® DESIGNrev Reference Manual

Siemens Industry Software

A0130105

A0130105

高速低功耗SAR ADC的关键技术研究与系统设计

高速低功耗SAR ADC的关键技术研究与系统设计

2002 Book On-ChipESDProtectionForIntegra

2002 Book On-ChipESDProtect[..]

基于CMOS工艺的负压低压差线性稳压器设计

基于CMOS工艺的负压低压差线性稳[..]

Matching Analysis and the Design of Low Offset Amplifiers

Matching Analysis and the Design of Low Offset Amplifiers

工作于亚阈值区的偏置基准电路-峰值电流镜

工作于亚阈值区的偏置基准电路-峰值电流镜

Category: that features three low phase-noise VCOs with a fundamental frequency range of 3.0 GHz to 6.0 GHz and a programmable dual RF output divider stage which allows coverage from 46.875 MHz to 6 GHz.

$Wideband RF PLL fractional/integer frequency synthesizer with integrated VCOs and LDOs$

Wideband RF PLL fractional/integer frequency synthesizer with ...

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