1V供电的低噪声带隙基准电压源
未知
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching ...
Chun-Cheng Liu;Soon-Jyh Chang;Guan-Ying Huang;Ying-Zu Lin
模拟IC 艾伦课件
ISSCC2021-T7-Basic Design Approaches to Accelerating Deep Neural ...
ISSCC 2019 Digest of Technical Papers
Design of Analog CMOS Integrated Circuits
Razavi
Understanding Jitter Requirements of PLL-Based Processors Application ...
ANALOG DEVICES INC.
PrimeSim� EMIR Reference Manual
Inc. Synopsys
ISSCC2021-SC2-PLL Architectures, Tradeoffs, and Key Application ...
无电容型LDO的研究现状与进展
Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller ...
Shih-An Yu & Peter R. Kinget
MSSC.2016.B. Razavi-TSPC Logic
现代控制系统 第12版
(美)RECHARD C.DORF,ROBERT H.BISHOP著;谢红卫,孙志强,宫二玲,经纪阳译
电路设计仿真
jianggx
Session 12: Innovations in Low-Power and Secure IoT
PLL WITH LOW SPURS
Digital Design Netlisting and Simulation SKILL Refer ence
Inc. Cadence Design Sys tems
te.2005.杨氏零点再发现
VLSI Physical Design: From Graph Partitioning to Timing Closure
Andrew B. Kahng, Jens Lienig, Igor L. Markov, Jin Hu