理工书库 lilin | Category: IEEE Journal of Solid-State Circuits;2002;37;11;10.1109/JSSC.2002.803936

Discover (Random Books)

Operation and Modeling of the MOS Transistor 3rd

Operation and Modeling of the MOS Transistor 3rd

现代控制系统

现代控制系统

高速高精度ADC中基准电压源的研究与设计 (1)

高速高精度ADC中基准电压源的研究与设计 (1)

硕士论文-宽带匹配网络的实频法研究

硕士论文-宽带匹配网络的实频法研究

CMOS Circuit Design, Layout, and Simulation, 3rd Edition (IEEE Press Series on Microelectronic Systems)

CMOS Circuit Design, Layout, and Simulation, 3rd Edition (IEEE ...

Optimum Feedback Amplifier Design For Control Systems

Optimum Feedback Amplifier Design For Control Systems

Timothy E. Biesecker

<4D6963726F736F667420576F7264202D2046504741D6D0494FCAB1D0F2D4BCCAF8B7D6CEF62E646F63>

<4D6963726F736F66[..]

IEEE Std 802.11b-1999

IEEE Std 802.11b-1999

Presentation

Presentation

CN104391533A-High-PSRR (power supply rejection ratio) LDO (low dropout regulator) circuit (1)

CN104391533A-High[..] (power supply rejection ratio) LDO (low ...

射频接收机中模拟信道滤波器设计

射频接收机中模拟信道滤波器设计

射频设计中的层次化建模

射频设计中的层次化建模

js.2010.PFD biased with shunt regulator

js.2010.PFD biased with shunt regulator

模拟CMOS集成电路设计第2版14609998

模拟CMOS集成电路设计第2版14609998

Distributed Loss-Compensation Techniques for Energy-Efficient Low-Latency On-Chip Communication

Distributed Loss-Compensation Techniques for Energy-Efficient ...

AMBA 3 AHB-Lite Protocol Specification

AMBA 3 AHB-Lite Protocol Specification

Instruction for Camera-Ready Paper

Instruction for Camera-Ready Paper

DELAY LOCKLOOP CIRCUIT

DELAY LOCKLOOP CIRCUIT

Category: IEEE Journal of Solid-State Circuits;2002;37;11;10.1109/JSSC.2002.803936

A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator

A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...

Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang