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ESD Analog Circuits and Design

ESD Analog Circuits and Design

模拟集成电路设计以LDO为例

模拟集成电路设计以LDO为例

CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated Circuits, Second Edition

CMOS射频集成电路设计(第二版) —— The Design of CMOS Radio-Frequency Integrated ...

美 & Thomas H. Lee 著 & 余志平周润德等译

Design of Analog CMOS Integrated Circuits

Design of Analog CMOS Integrated Circuits

概率论基础教程原书第9版

概率论基础教程原书第9版

（美）罗斯著

1V供电的低噪声带隙基准电压源

1V供电的低噪声带隙基准电压源

Session 20: High-Performance VCOs

Session 20: High-Performance VCOs

tcsii.2005.A new modeling and optimization of gain-boosted cascode amplifier for high-speed and low-voltage applications

tcsii.2005.A new modeling and optimization of gain-boosted cascode ...

Verilog数字系统设计教程

Verilog数字系统设计教程

简并点优化的高性能带隙基准电路应建华

简并点优化的高性能带隙基准电路应建华

Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

SystemVerilog 验证方法学 - Verification Methodology Manual for SystemVerilog

Janick Bergeron & Eduard Cemy & Alan Hunter & Andrew Nightingale 著 & 夏宇闻译

逐达逼近型模数转换器的低功耗与高速设计技术研究

逐达逼近型模数转换器的低功耗与高速[..]

射频集成电路

射频集成电路

S_Para_E.PM6

S_Para_E.PM6

一种低压CMOSLDO稳压电源电路

一种低压CMOSLDO稳压电源电路

Altera系列FPGA芯片IP核详解

Altera系列FPGA芯片IP核详解

Microsoft Word - Frequency Response.doc

Microsoft Word - Frequency Response.doc

Category: high efficiency

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled Buck Converter With A<sup>2</sup>-Comparator and Sleep-Time Detector for IoT Application

A 240-nA Quiescent Current, 95.8% Efficiency AOT-Controlled ...

Wenbin Huang & Lianxi Liu & Xufeng Liao & Chengzhi Xu & Yonyuan Li