A mixed-mode esd protection circuit simulation-design methodology ...
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LDO低压差线性稳压器核心电路的设计
Spectre Circuit Simulator Components and Device Models Reference
Inc. Cadence Design Sys tems
PLL Perfomance, Simulation, and Design
Dean Banerjee
Sampled Systems and the Effects of Clock Phase Noise and Jitter ...
Analog Devices, Inc.
SAR ADC-MIT
Analysis and Design of Transimpedance Amplifiers for Optical ...
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信号与系统上 第三版
Session 23
ISSCC2021-T5-Cali[..] Techniques in ADCs
抗浪涌静电器件防护机理与片上集成实验研究
Legend User
基于CMOS工艺的负压低压差线性稳[..]
axi4_stream_man.book
merickso
应用随机过程概率论模型导论 (Sheldon M.Ross) (Z-Library)
Digital Control
数字滤波器的MATLAB与FPGA[..]
bingdian001.com
Session 11V-ADVANCED WIRELINE LINKS AND TECHNIQUES
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.