Verilog数字VLSI设计教程
【作 者】李林编著
Noise and Spur Comparison of Delta-Sigma Modulators in Fractional-N ...
Bo Zhou & Yao Li & Fuyuan Zhao
THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...
iccad095
现代控制理论 第2版 (张嗣瀛) (Z-Library)
未知
EESM692
Prof. Alex Leung
A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...
Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang
模拟CMOS集成电路设计 第2版14609998
Systematic Design of Analog CMOS Circuits
CMOS-Voltage-Refe[..]
4<8=8AB@0B>@
Dynamic Analysis of Switching-Mode DC DC Converters-Springer ...
The Biquadratic Filter [A Circuit for All Seasons]
Behzad Razavi
超标量处理器设计 (姚永斌) (z-lib.org)
模拟电路设计——鲁棒性设计、Sig[..] (模拟电路设计——鲁棒性设计、Si[..] (z-lib.org)
作者
Control Systems Engineering
Norman S. Nise
CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...
D.J. Foley;M.P. Flynn
Understanding Phase Noise in LC VCOs
A Key Problem in RF Integrated Circuits
CMOS Circuit Design, Layout, and Simulation, 3rd Edition (IEEE ...
R. Jacob Baker
模拟集成电路设计与仿真-何乐年
Edward
IEEE Standard for Ethernet