理工书库 lilin | Category: Theory of Modeling and Simulation

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Dynamic Response of Linear Systems Impact of Pole & Zero Locations

Dynamic Response of Linear Systems Impact of Pole & Zero Locations

SSReader Print.

SSReader Print.

高速低功耗逐次逼近型模数转换器的研究与设计

高速低功耗逐次逼近型模数转换器的研[..]

一种用于LDO系统的极点频率调整方法

一种用于LDO系统的极点频率调整方法

维普资讯有限公司

ISSCC2021-T10-Fundamentals of Fully-Integrated Voltage Regulators

ISSCC2021-T10-Fun[..] of Fully-Integrated Voltage Regulators

模拟电路设计——鲁棒性设计、Sigma-Delta转换器、射频识别技术 (模拟电路设计——鲁棒性设计、Sigma-Delta转换器、射频识别技术) (z-lib.org)

模拟电路设计——鲁棒性设计、Sig[..] (模拟电路设计——鲁棒性设计、Si[..] (z-lib.org)

2.7Gbps收发器中LVDS驱动电路的设计

2.7Gbps收发器中LVDS驱动[..]

柯明道ESD简洁版

柯明道ESD简洁版

深亚微米FPGA结构与CAD设计 12083165 2

深亚微米FPGA结构与CAD设计 12083165 2

无线通信中的射频收发系统设计（英文版）

无线通信中的射频收发系统设计（英文版）

全数字锁相环建模及分析代码-2014

全数字锁相环建模及分析代码-2014

两种新型CMOS带隙基准电路程军

两种新型CMOS带隙基准电路程军

基准电压源和线性稳压器的设计

基准电压源和线性稳压器的设计

Harmonic balance finite element method applications in nonlinear electromagnetics and power systems (Lu, Junwei Yamada, Sotoshi Zhao, Xiaojun) (z-lib.org)

Harmonic balance finite element method applications in nonlinear ...

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE Journal of

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation in the Future with Digital Signal Processing for Mitigating Spur and Interference

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...

Cheng-Ru Ho & Mike Shuo-Wei Chen

数值分析.Timothy Sauer.图灵中文扫描版

数值分析.Timothy Sauer.图灵中文扫描版

A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator

A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...

Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang

Category: Theory of Modeling and Simulation

Theory of Modeling and Simulation (Bernard P. Zeigler, Alexandre Muzy etc.) (Z-Library)

Theory of Modeling and Simulation (Bernard P. Zeigler, Alexandre ...

Bernard P. Zeigler