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一种低噪声高电源抑制比CMOS低压差线性稳压器

一种低噪声高电源抑制比CMOS低压[..]

1499066564577362562-06963235

14990665645773625[..]

CMOS带隙基准源研究与设计

CMOS带隙基准源研究与设计

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Fundamentals of Digital Logic with Verilog Design, THIRD EDITION

Stephen Brown & Zvonko Vranesic

CN104977963A-兆易创新-一种无运放低功耗高电源抑制比的带隙基准 (1)

CN104977963A-兆易创新[..] (1)

Ring PLL的详细设计博士论文

Ring PLL的详细设计博士论文

Algorithms for VLSI Physical Design Automation, 3E

Algorithms for VLSI Physical Design Automation, 3E

Naveed Sherwani

模拟CMOS集成电路设计答案(拉扎维)

模拟CMOS集成电路设计答案(拉扎维)

Operation and Modeling of the MOS Transistor By Tsividis

Operation and Modeling of the MOS Transistor By Tsividis

ESD Design and Synthesis (1)

ESD Design and Synthesis (1)

Nonlinear Circuit Simulation and Modeling Fundamentals for Microwave Design (The Cambridge RF and Microwave Engineering Series) by José Carlos Pedro, David E. Root, Jianjun Xu, Luís Cótimos Nunes (z-lib.o

Nonlinear Circuit Simulation and Modeling Fundamentals for Microwave ...

基准电压源和线性稳压器的设计

基准电压源和线性稳压器的设计

MOSAmpNoise.dvi

MOSAmpNoise.dvi

Session 35

Session 35

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带隙基准电路的研究

带隙基准电路的研究

ADI 技术指南合集

ADI 技术指南合集

Nested Miller compensation in low-power CMOS design

Nested Miller compensation in low-power CMOS design

Ka Nang Leung;P.K.T. Mok

Category: 100 Gigabit Ethernet

IEEE Standard for Ethernet

IEEE Standard for Ethernet