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一种自参考结构的高速高精度片上时钟抖动测量系统

一种自参考结构的高速高精度片上时钟[..]

Designing Control Loops for Linear and Switching Power Supplies: A Tutorial Guide

Designing Control Loops for Linear and Switching Power Supplies: ...

开关电容电路从入门到精通 -刘明亮

开关电容电路从入门到精通 -刘明亮

高速数字电路设计中信号完整性分析与研究

高速数字电路设计中信号完整性分析与研究

微波工程

微波工程

Phase Locked Loops for Wireless Communications

Phase Locked Loops for Wireless Communications

Microsoft Word - AXI protocol 翻译.doc

Microsoft Word - AXI protocol 翻译.doc

tcsii.2005.A new modeling and optimization of gain-boosted cascode amplifier for high-speed and low-voltage applications

tcsii.2005.A new modeling and optimization of gain-boosted cascode ...

Computational electromagnetism variational formulations, complementarity, edge elements by Alain Bossavit, Isaak D. Mayergoyz (z-lib.org)

Computational electromagnetism variational formulations, complementarity, ...

Verilog HDL Design Examples

Verilog HDL Design Examples

Joseph Cavanagh

拉扎维数据转换器设计原版 (1)

拉扎维数据转换器设计原版 (1)

DesignWare Synthesizable Components for AMBA 3 AXI, and AMBA 4 AXI User Guide, Version 2020.03a

DesignWare Synthesizable Components for AMBA 3 AXI, and AMBA ...

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, IEEE Journal of

A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier - Solid-State Circuits, ...

通信原理第7版

通信原理第7版

樊昌信，曹丽娜编著

数值分析（第5版）习题解答 (李庆扬) (z-lib.org)

数值分析（第5版）习题解答 (李庆扬) (z-lib.org)

高速串行接口时钟数据恢复电路设计研究

高速串行接口时钟数据恢复电路设计研究

Design of Chopper-Stabilized Amplifiers With Reduced Offset for Sensor Applications

Design of Chopper-Stabilized Amplifiers With Reduced Offset ...

SystemVerilog验证测试平台编写指南

SystemVerilog验证测试平台编写指南

Category: CIRCUITS AND DEVICES

Analysis and Design of CMOS Clocking Circuits for Low Phase Noise

Analysis and Design of CMOS Clocking Circuits for Low Phase ...

Woorham Bae & Deog-Kyoon Jeong