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基于0.13μm SOI CMOS工艺的高性能LDO设计

基于0.13μm SOI CMOS工艺的高性能LDO设计

THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN PHY

THE DESIGN OF MASTER-SLAVE DLL FOR DDR2 SDRAM CONTROLLER IN ...

Modified modeling of Miller compensation for two-stage operational amplifiers

Modified modeling of Miller compensation for two-stage operational ...

H.C. Yang;D.J. Allstot

Analysis and design of monolithic, high PSR, linear regulators for SoC applications - SOC Conference, 2004. Proceedings. IEEE International

Analysis and design of monolithic, high PSR, linear regulators ...

$Enhanced phase noise modeling of fractional-N frequency synthesizers$

Enhanced phase noise modeling of fractional-N frequency synthesizers

H. Arora;N. Klemmer;J.C. Morizio;P.D. Wolf

Phase Locked Loops for Wireless Communications

Phase Locked Loops for Wireless Communications

电路原理（第7版）

电路原理（第7版）

Session 14: mm-Wave Transceivers for Communication and Radar

Session 14: mm-Wave Transceivers for Communication and Radar

Internal and external op-amp compensation: a control-centric tutorial - American Control Conference, 2004. Proceedings of the 2004

Internal and external op-amp compensation: a control-centric ...

Verification of SD/MMC Controller IP Using UVM

Verification of SD/MMC Controller IP Using UVM

全数字锁相环建模及分析代码-2014

全数字锁相环建模及分析代码-2014

开关电源设计第3版

开关电源设计第3版

（美）普利斯曼，比利斯，莫瑞著

CN103036558B-SMIC2015-扩展线性范围的v2i

CN103036558B-SMIC[..]

Design of class AB output stages using the structural methodology

Design of class AB output stages using the structural methodology

V. Ivanov & I. Filanovsky

ADS射频电路设计与仿真从入门到精通

ADS射频电路设计与仿真从入门到精通

Session 10

Session 10

Microsoft Word - 131_63212-IJAER ok 4118-modified document

Microsoft Word - 131_63212-IJAER ok 4118-modified document

Category: AUI

IEEE Standard for Ethernet

IEEE Standard for Ethernet