理工书库 lilin | Category: This core implements a JESD204B interface supporting a line rate of up to 12.5 Gb/s on 1- 12 lanes using GTX or GTH transceivers in Zynq-7000 AP SoC devices

Discover (Random Books)

A comparative study of various current mirror configurations_ Topologies and characteristics

A comparative study of various current mirror configurations_ ...

Bhawna Aggarwal & Maneesha Gupta & A.K. Gupta

模拟集成电路设计精粹英文版

模拟集成电路设计精粹英文版

Session 33

Session 33

一种应用于DC DC转换器的自举电路设计

一种应用于DC DC转换器的自举电路设计

Distributed MOS varactor biasing for VCO gain equalization in 0.13 /spl mu/m CMOS technology

Distributed MOS varactor biasing for VCO gain equalization in ...

J. Mira & T. Divel & S. Ramet & J.-B. Begueret & Y. Deval

RF Circuit Design

RF Circuit Design

Spectre Circuit Simulator and Accelerated Parallel Simula tor RF Analysis in ADE Explorer User Guide

Spectre Circuit Simulator and Accelerated Parallel Simula tor ...

Inc. Cadence Design Sys tems

用于低相位噪声LC VCO的低噪声可调LDO的设计

用于低相位噪声LC VCO的低噪声可调LDO的设计

Session 6: High-Performance Receivers and Transmitters for Sub-6GHz Radios

Session 6: High-Performance Receivers and Transmitters for Sub-6GHz ...

Report for current mirror OPAMP

Report for current mirror OPAMP

使用ADS对多个S参数进行离散扫描

使用ADS对多个S参数进行离散扫描

XU,YUE (K-China,ex1)

一种基于LDO线性稳压器的放大器设计

一种基于LDO线性稳压器的放大器设计

一种用于LDO的低功耗带隙基准电压源

一种用于LDO的低功耗带隙基准电压源

Abidi-Pan, Hui.University of California, Los Angeles

Abidi-Pan, Hui.University of California, Los Angeles

一种高精密CMOS带隙基准源王彦

一种高精密CMOS带隙基准源王彦

电源芯片中CMOS带隙基准源与微调的设计与实现 (1)

电源芯片中CMOS带隙基准源与微调[..] (1)

一种具有温度补偿高电源抑制比的带隙基准源何捷 (1)

一种具有温度补偿高电源抑制比的带隙基准源何捷 (1)

模拟IC设计

模拟IC设计

Category: This core implements a JESD204B interface supporting a line rate of up to 12.5 Gb/s on 1- 12 lanes using GTX or GTH transceivers in Zynq-7000 AP SoC devices

JESD204 v7.2 LogiCORE IP Product Guide (PG066)

JESD204 v7.2 LogiCORE IP Product Guide (PG066)