理工书库 lilin | Category: and using the waveform viewer to analyze and debug a design. Documents behavioral simulation of an RTL design as well as functional and timing simulation of synthesized and implemented designs.

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高效率 PWM 控制电流型 DC-DC

高效率 PWM 控制电流型 DC-DC

Harmonic balance finite element method applications in nonlinear electromagnetics and power systems (Lu, Junwei Yamada, Sotoshi Zhao, Xiaojun) (z-lib.org)

Harmonic balance finite element method applications in nonlinear ...

ISSCC2021 Session 15

ISSCC2021 Session 15

matlab 80

matlab 80

Method of Moments for 2D Scattering Problems

Method of Moments for 2D Scattering Problems

Christophe Bourlier

Laker-Sansen-Design of Analog Integrated Circuits and Systems (1994)

Laker-Sansen-Design of Analog Integrated Circuits and Systems ...

Understanding Delta-Sigma Data Converters

Understanding Delta-Sigma Data Converters

GABOR C. TEMES & Richard Schreier

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

A 0.92mW 10-bit 50-MS/s SAR ADC in 0.13μm CMOS process

Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Yin-Zu Lin

eetop.cn 线性代数及其应用（英文第四版－Gilbert Strang

eetop.cn 线性代数及其应用（英文第四版－Gi[..] Strang

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...

Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly

Numerical Analysis

Numerical Analysis

Richard L. Burden

电子电路的计算机辅助分析与设计方法.汪蕙

电子电路的计算机辅助分析与设计方法.汪蕙

Avalon® Interface Specifications

Avalon® Interface Specifications

Intel Corporation

Session 10

Session 10

精通开关电源设计-中文版-第一版

精通开关电源设计-中文版-第一版

射频集成电路与系统

射频集成电路与系统

李智群王志功编著

Relationship between frequency response and settling time of operational amplifiers

Relationship between frequency response and settling time of ...

B.Y.T. Kamath, R.G. Meyer & P.R. Gray

PLL频率合成器的杂散性能分析

PLL频率合成器的杂散性能分析

Category: and using the waveform viewer to analyze and debug a design. Documents behavioral simulation of an RTL design as well as functional and timing simulation of synthesized and implemented designs.

Vivado Design Suite User Guide: Logic Simulation (UG900)

Vivado Design Suite User Guide: Logic Simulation (UG900)