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2010_FrontMatter_pgs001-005_stv

2010_FrontMatter_[..]

CMOS射频集成电路分析与设计清华池保勇

CMOS射频集成电路分析与设计清华池保勇

微带电路

微带电路

一种适用于DDR内存驱动的LDO芯片设计

一种适用于DDR内存驱动的LDO芯片设计

Microsoft Word - LNA.doc

Microsoft Word - LNA.doc

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS

A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm ...

Kuan-Yueh Shen & Syed Feruz Syed Farooq & Yongping Fan & Khoa Minh Nguyen & Qi Wang & Mark L. Neidengard & Nasser Kurd & Amr Elshazly

一种大电流LDO稳压器的设计

一种大电流LDO稳压器的设计

线性代数及其应用（第5版－Gilbert Strang

线性代数及其应用（第5版－Gilbert Strang

Intel® Quartus® Prime Standard Edition User Guide Platform Designer

Intel® Quartus® Prime Standard Edition User Guide Platform Designer

Intel Corporation

光通信集成电路设计第2版中文——拉扎维

光通信集成电路设计第2版中文——拉扎维

CMOS 带隙基准源研究-tangzhangwen

CMOS 带隙基准源研究-tangzhangwen

高精度sigma-delta ADC设计研究与实现

高精度sigma-delta ADC设计研究与实现

带ESD保护结构的IO单元库的设计

带ESD保护结构的IO单元库的设计

模拟CMOS集成电路设计第2版14609998

模拟CMOS集成电路设计第2版14609998

Presentation

Presentation

New developments in IC voltage regulators

New developments in IC voltage regulators

ISSCC2021-T10-Fundamentals of Fully-Integrated Voltage Regulators

ISSCC2021-T10-Fun[..] of Fully-Integrated Voltage Regulators

Power systems-on-chip practical aspects of design (Allard, Bruno) (Z-Library)

Power systems-on-chip practical aspects of design (Allard, Bruno) ...

Category: IEEE Microwave Magazine;2019;20;5;10.1109/MMM.2019.2898022

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation in the Future with Digital Signal Processing for Mitigating Spur and Interference

Smoothing the Way for Digital Phase-Locked Loops: Clock Generation ...

Cheng-Ru Ho & Mike Shuo-Wei Chen