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全单片集成的多模CMOS正交频率综合器的研究

全单片集成的多模CMOS正交频率综[..]

TWO-STAGE FULLY-DIFFERENTIAL OPAMPS

TWO-STAGE FULLY-DIFFERENTIAL OPAMPS

AM-PM distorion

AM-PM distorion

Computational Methods for Electromagnetic Phenomena

Computational Methods for Electromagnetic Phenomena

Session 20: High-Performance VCOs

Session 20: High-Performance VCOs

数值分析.Timothy Sauer.图灵中文扫描版

数值分析.Timothy Sauer.图灵中文扫描版

教材：李庆扬数值分析-第五版

教材：李庆扬数值分析-第五版

模拟CMOS集成电路设计答案(拉扎维)

模拟CMOS集成电路设计答案(拉扎维)

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications—Amendment 4: Enhancements for Very High Throughput for Operation in Bands below 6 GHz

IEEE Std 802.11ac™-2013, IEEE Standard for Information technology—Teleco[..] ...

LAN/MAN Standards Committee of the IEEE Computer Society

The advanced part of A treatise on the dynamics of a system of rigid bodies. Being part II of a treatise on the whole subject. With numerous examples. By Edward John Routh.

The advanced part of A treatise on the dynamics of a system ...

Routh, Edward John, 1831-1907.

CMOS模拟集成电路设计

CMOS模拟集成电路设计

（美）艾伦，（美）霍尔伯格著

CMOS模拟集成电路设计与仿真实例-基于Cadence ADE 陈成颖

CMOS模拟集成电路设计与仿真实例[..] ADE 陈成颖

Microsoft PowerPoint - Bandgap and LDO.pptx

Microsoft PowerPoint - Bandgap and LDO.pptx

ISSCC2021-T2-Fundamentals of Memory Subsystem Design for HPC and AI

ISSCC2021-T2-Fund[..] of Memory Subsystem Design for HPC and ...

Session 17

Session 17

verilog HDL那些事

verilog HDL那些事

The Definitive ANTLR 4 Reference

The Definitive ANTLR 4 Reference

CMOS 集成电路设计手册第3版·模拟电路篇=CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION 3RD EDITION

CMOS 集成电路设计手册第3版·模拟电路篇=CMOS CIRCUIT DESIGN LAYOUT AND SIMULATION ...

Category: IEEE Journal of Solid-State Circuits;2001;36;3;10.1109/4.910480

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator

CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and ...

D.J. Foley;M.P. Flynn