Design of an Active Harmonic Rejection N-Path Filter for Highly ...
Caleb Mosby Munsill
Session 1: Plenary Session — Invited Papers
未知
Low-noise monolithic amplifier design: Bipolar versus CMOS
The Problem of PLL Power Consumption
Behzad Razavi
高速低功耗逐次逼近型模数转换器的研[..]
半导体物理与器件 （第三版）
（美）尼曼著 赵毅强 姚素英 解晓东等译
(Analog Circuits and Signal Processing) Danica Stefanovic, Maher ...
Structu
ADS2011射频电路设计与仿真实例
徐兴福著
Artificial Intelligence: A Modern Approach, Global Edition, ...
Stuart Russell / Peter Norvig
普林斯顿概率论读本 (史蒂文．J．米勒 (Steven J. Miller)) (Z-Library)
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu & Soon-Jyh Chang & Guan-Ying Huang & Ying-Zu Lin & Chung-Ming Huang & Chih-Hao Huang & Linkai Bu & Chih-Chung Tsai
Design Optimization of Power and Area of Two-Stage CMOS Operational ...
Telugu Maddileti;Govindarajulu Salendra;Chandra Mohan Reddy ...
PLL 设计仿真及应用
Roland E. Best
逐达逼近型模数转换器的低功耗与高速[..]
RF ANALOG IC DESIGN PROJECT
ctao
微波射频电路设计与仿真100例
Administrator
Using ADS to simulate Noise Figure using a large-signal transistor ...
Steve Long
Next-Generation ADCs, High-Performance Power Management, and ...
Truly Nonlinear Oscillations: Harmonic Balance, Parameter Expansions, ...
Ronald E. Mickens