Session 15: Compute-in-Memory Processors for Deep Neural Networks
未知
模拟集成电路
艾伦
12bit pipeline ADC design
Digital Integrated Circuits Analysis and Design
John E. Ayers
HIGH SPEED AND LOW POWER DYNAMIC LATCH COMPARATOR
examples
server1
概率论与数理统计 (同济大学数学系) (Z-Library)
学校代码 10530 学 号 201110061316
zxsr70885
参考书 芯片接口库IO LIBRARY和ESD电路的研发设计应用 (OCR) 王国立
Memory systems_ cache, DRAM, disk -- Bruce Jacob, Spencer Ng, ...
Gabriel Rincon-Mora - Analog IC Design with Low-Dropout Regulators ...
Analog IC Design & Low-Dropout Regulators (LDOs) (Electronic Engineering) (2009) ...
数值分析
模拟集成电路分析与设计（第二版）
TWO-STAGE FULLY-DIFFERENTIAL OPAMPS
Vishal Home PC
模拟CMOS集成电路设计
Behzad.Razavi（第2版 ）（中文 ）hd R2A修复版本2023-11-08
The Design of CMOS Radio-Frequency Integrated Circuits, Second ...
Thomas H. Lee
相位噪声jitter基本定义
yzx
Calibre® Local Printability Enhancement User's and Reference ...
Siemens Industry Software
7 Series FPGAs GTX/GTH Transceivers User Guide (UG476)
Xilinx, Inc.