分类号 密级
USER
Modeling Jitter in PLL-based Frequency Synthesizers
Ken Kundert
低压、低功耗、高精度的逐次逼近型
ycp
一种适用于DDR内存驱动的LDO芯片设计
未知
Pieter Harpe, Andrea Baschirotto, Kofi A. A. Makinwa eds. High-Performance ...
数值分析
Session 17
哈尔滨工业大学硕士毕业论文模板
yinhf
数字通信同步技术的MATLAB与F[..] Altera Verilog版 [杜勇 编著] 2015年版
High Performance Control of AC Drives With MATLAB®/Simulink
Haitham Abu-Rub & Atif Iqbal & and Jaroslaw Guzinski
NONE
TOM
信号与系统 2nd 西蒙赫金
esd-circuits-and-[..]
Universal Serial Bus 3.0 Specification
IEEE Std 1801™-2018, IEEE Standard for Design and Verification ...
Design Automation Standards Committee of the IEEE Computer Society
Wideband RF PLL fractional/integer frequency synthesizer with ...
STMICROELECTRONICS
数字信号处理 基于计算机的方法 (Sanjit，K.，Mitra) (Z-Library)
Internal and external op-amp compensation: a control-centric ...
7 Series FPGAs Gen2 Integrated Block for PCIe to AXI4-Lite Bridge ...
Xilinx, Inc.