JSSC 202212
未知
CMOS模拟集成电路版图设计与验证 基于Cadence Virtuoso与Mentor Calibre
尹飞飞
SAR ADC-MIT
PLL 设计仿真及应用
Roland E. Best
基准源和温度检测模块设计-tang[..]
zwtang
Noise and Spurious Tones Management Techniques for Multi-GHz ...
Adrian Maxim
AMPLIFIER ARCHITECTURE AND APPLICATION THEREOF TO A BAND-GAP ...
一种超低静态功耗LDO的设计
基于LDO新型过流保护电路设计
Electronic Circuit and System Simulation Methods
Lawrence T. Pillage, Ronald A. Rohrer, Chandramouli Visweswariah
Virtuoso Parameterized Cell Reference
Inc. Cadence Design Sys tems
模拟CMOS集成电路 第二版 拉扎维 (拉扎维)
Digital Control
高频高速电子系统中的信号完整性研究
fluids-04-00159-v2
(Analog Circuits and Signal Processing) Danica Stefanovic, Maher ...
Structu
eetop.cn (Paper)The Flipped Voltage Follower A Useful Cell for
Generate ESD Source in ADS
TU,NASH (K-Taiwan,ex1)
IEEE Standard for Ethernet