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Discover (Random Books)

数值分析(第5版)习题解答

数值分析(第5版)习题解答

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抗浪涌静电器件防护机理与片上集成实验研究

抗浪涌静电器件防护机理与片上集成实验研究

Legend User

Understanding Jitter and Phase Noise : A Circuits and Systems Perspective

Understanding Jitter and Phase Noise : A Circuits and Systems ...

Nicola Da Dalt; Ali Sheikholeslami & Ali Sheikholeslami

Power supply rejection ratio in operational transconductance amplifiers - Circuits and Systems, IEEE Transactions on

Power supply rejection ratio in operational transconductance ...

IEEE

jrproc.1950.Bothwell, F.E.-Nyquist Diagrams and the Routh-Hurwitz Stability Criterion

jrproc.1950.Bothw[..] F.E.-Nyquist Diagrams and the Routh-Hurwitz ...

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低压高速LDO电路系统的分析与设计

低压高速LDO电路系统的分析与设计

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Microsoft Word - AXI protocol 翻译.doc

Microsoft Word - AXI protocol 翻译.doc

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SAR ADC-MIT

SAR ADC-MIT

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低电压CMOS分数分频锁相环频率综合器  关键技术研究

低电压CMOS分数分频锁相环频率综合器 关键技术研究

LU HUNG

Report for current mirror OPAMP

Report for current mirror OPAMP

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DCDC变换器工作原理及设计

DCDC变换器工作原理及设计

MPS

Oscillator phase noise: a tutorial

Oscillator phase noise: a tutorial

T.H. Lee;A. Hajimiri

How to Calculate Balun Performances using ADS Expressions

How to Calculate Balun Performances using ADS Expressions

Che-Sheng Chen

Book.DVI

Book.DVI

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A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE Journal of

A 2.7-V 900-MHz CMOS LNA and Mixer - Solid-State Circuits, IEEE ...

IEEE

一种基于内部迟滞比较器的新型RC振荡器

一种基于内部迟滞比较器的新型RC振荡器

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A low-power small-area /spl plusmn/7.28-ps-jitter 1-GHz DLL-based clock generator

A low-power small-area /spl plusmn/7.28-ps-ji[..] 1-GHz DLL-based ...

Chulwoo Kim & In-Chul Hwang & Sung-Mo Kang

Verilog数字系统设计教程

Verilog数字系统设计教程

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Category: V7

Xilinx DS534, FIR Compiler v5.0, Data Sheet

Xilinx DS534, FIR Compiler v5.0, Data Sheet

Xilinx, Inc.

Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet

Xilinx DS558, LogiCORE IP DDS Compiler v4.0, Data Sheet

Xilinx, Inc.

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface (SPI) v3.1, Product Guide

Xilinx PG153 LogiCORE IP AXI Quad Serial Peripheral Interface ...

Xilinx, Inc.

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

AXI Interconnect v2.1 LogiCORE IP Product Guide (PG059)

Xilinx, Inc.

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP Product Guide (PG055)

AXI Memory Mapped to PCI Express (PCIe) Gen2 v2.8 LogiCORE IP ...

Xilinx, Inc.

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